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Low Temperature Processing to Form Oxidation Insensitive Electrical Contact at Silicon Nanowire/Nanowire Junctions
Author(s) -
Ter Céline,
Serre Pauline,
Lebrun JeanMarie,
Brouzet Virginie,
Legallais Maxime,
David Sylvain,
Luciani Thierry,
Pascal Céline,
Baron Thierry,
Missiaen JeanMichel
Publication year - 2015
Publication title -
advanced electronic materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.25
H-Index - 56
ISSN - 2199-160X
DOI - 10.1002/aelm.201500172
Subject(s) - microelectronics , nanowire , electronics , materials science , nanotechnology , limiting , silicon , semiconductor , optoelectronics , scalability , semiconductor device , cmos , engineering physics , electrical engineering , computer science , engineering , mechanical engineering , layer (electronics) , database
The development of functional devices compatible with standard microelectronic processes is central to the More‐than‐Moore and Beyond‐CMOS (complementary metal oxide semiconductor) electronic fields. Devices based on nanowires (NWs) are very promising, but their integration remains complex and submitted to variability limiting the potential scalability. The field of flexible electronics is another one in which the standard microelectronic industry struggles to propose a solution. Despite tremendous progress, organic materials remain highly sensitive to oxygen and humidity and deteriorate under UV irradiation, thus limiting their long‐term operation. Here, it is shown that Si NW networks, also called Si nanonets, provide an easy‐to‐process single answer to develop flexible electronics and NW‐based devices. As a major contribution to the state of the art, it is demonstrated that stable Si NW–NW junctions, insensitive to oxidation, can be formed with low variability, which opens up a new route to form reproducible and reliable devices, with long‐term performances, presumably over several years, for NW‐based or flexible devices using Si as active element.