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High‐Performance and Reliable Lead‐Free Layered‐Perovskite Transistors
Author(s) -
Zhu Huihui,
Liu Ao,
Shim Kyu In,
Hong Jisu,
Han Jeong Woo,
Noh YongYoung
Publication year - 2020
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.202002717
Subject(s) - materials science , passivation , thin film transistor , grain boundary , perovskite (structure) , optoelectronics , transistor , nanotechnology , chemical engineering , electrical engineering , voltage , layer (electronics) , metallurgy , microstructure , engineering
Perovskites have been intensively investigated for their use in solar cells and light‐emitting diodes. However, research on their applications in thin‐film transistors (TFTs) has drawn less attention despite their high intrinsic charge carrier mobility. In this study, the universal approaches for high‐performance and reliable p‐channel lead‐free phenethylammonium tin iodide TFTs are reported. These include self‐passivation for grain boundary by excess phenethylammonium iodide, grain crystallization control by adduct, and iodide vacancy passivation through oxygen treatment. It is found that the grain boundary passivation can increase TFT reproducibility and reliability, and the grain size enlargement can hike the TFT performance, thus, enabling the first perovskite‐based complementary inverter demonstration with n‐channel indium gallium zinc oxide TFTs. The inverter exhibits a high gain over 30 with an excellent noise margin. This work aims to provide widely applicable and repeatable methods to make the gate more open for intensive efforts toward high‐performance printed perovskite TFTs.