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Corrugated Heterojunction Metal‐Oxide Thin‐Film Transistors with High Electron Mobility via Vertical Interface Manipulation
Author(s) -
Lee Minuk,
Jo JeongWan,
Kim YoonJeong,
Choi Seungbeom,
Kwon Sung Min,
Jeon Seong Pil,
Facchetti Antonio,
Kim YongHoon,
Park Sung Kyu
Publication year - 2018
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.201804120
Subject(s) - materials science , heterojunction , thin film transistor , optoelectronics , passivation , threshold voltage , transistor , indium tin oxide , electron mobility , oxide , thin film , layer (electronics) , nanotechnology , voltage , electrical engineering , engineering , metallurgy
A new strategy is reported to achieve high‐mobility, low‐off‐current, and operationally stable solution‐processable metal‐oxide thin‐film transistors (TFTs) using a corrugated heterojunction channel structure. The corrugated heterojunction channel, having alternating thin‐indium‐tin‐zinc‐oxide (ITZO)/indium‐gallium‐zinc‐oxide (IGZO) and thick‐ITZO/IGZO film regions, enables the accumulated electron concentration to be tuned in the TFT off‐ and on‐states via charge modulation at the vertical regions of the heterojunction. The ITZO/IGZO TFTs with optimized corrugated structure exhibit a maximum field‐effect mobility >50 cm 2 V −1 s −1 with an on/off current ratio of >10 8 and good operational stability (threshold voltage shift <1 V for a positive‐gate‐bias stress of 10 ks, without passivation). To exploit the underlying conduction mechanism of the corrugated heterojunction TFTs, a physical model is implemented by using a variety of chemical, structural, and electrical characterization tools and Technology Computer‐Aided Design simulations. The physical model reveals that efficient charge manipulation is possible via the corrugated structure, by inducing an extremely high carrier concentration at the nanoscale vertical channel regions, enabling low off‐currents and high on‐currents depending on the applied gate bias.