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Mobility Engineering in Vertical Field Effect Transistors Based on Van der Waals Heterostructures
Author(s) -
Shin Yong Seon,
Lee Kiyoung,
Kim Young Rae,
Lee Hyangsook,
Lee I. Min,
Kang Won Tae,
Lee Boo Heung,
Kim Kunnyun,
Heo Jinseong,
Park Seongjun,
Lee Young Hee,
Yu Woo Jong
Publication year - 2018
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.201704435
Subject(s) - materials science , ohmic contact , transistor , electron mobility , optoelectronics , schottky barrier , heterojunction , van der waals force , field effect transistor , nanotechnology , voltage , electrical engineering , chemistry , engineering , layer (electronics) , diode , molecule , organic chemistry
Vertical integration of 2D layered materials to form van der Waals heterostructures (vdWHs) offers new functional electronic and optoelectronic devices. However, the mobility in vertical carrier transport in vdWHs of vertical field‐effect transistor (VFET) is not yet investigated in spite of the importance of mobility for the successful application of VFETs in integrated circuits. Here, the mobility in VFET of vdWHs under different drain biases, gate biases, and metal work functions is first investigated and engineered. The traps in WSe 2 are the main source of scattering, which influences the vertical mobility and three distinct transport mechanisms: Ohmic transport, trap‐limited transport, and space‐charge‐limited transport. The vertical mobility in VFET can be improved by suppressing the trap states by raising the Fermi level of WSe 2 . This is achieved by increasing the injected carrier density by applying a high drain voltage, or decreasing the Schottky barrier at the graphene/WSe 2 and metal/WSe 2 junctions by applying a gate bias and reducing the metal work function, respectively. Consequently, the mobility in Mn vdWH at +50 V gate voltage is about 76 times higher than the initial mobility of Au vdWH. This work enables further improvements in the VFET for successful application in integrated circuits.