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Monolithic 3D CMOS Using Layered Semiconductors
Author(s) -
Sachid Angada B.,
Tosun Mahmut,
Desai Sujay B.,
Hsu ChingYi,
Lien DerHsien,
Madhvapathy Surabhi R.,
Chen YuZe,
Hettick Mark,
Kang Jeong Seuk,
Zeng Yuping,
He JrHau,
Chang Edward Yi,
Chueh YuLun,
Javey Ali,
Hu Chenming
Publication year - 2016
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.201505113
Subject(s) - materials science , electronic circuit , cmos , integrated circuit , optoelectronics , semiconductor , voltage , inverter , electrical engineering , nanotechnology , electronic engineering , engineering
Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low‐temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high‐density, ultralow‐voltage, and ultralow‐power applications.