Design of an Efficient Charge‐Trapping Layer with a Built‐In Tunnel Barrier for Reliable Organic‐Transistor Memory | Zendy

Park YoungSu | Zendy; Lee JangSik | Zendy

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Design of an Efficient Charge‐Trapping Layer with a Built‐In Tunnel Barrier for Reliable Organic‐Transistor Memory

Author(s) -

Park YoungSu,

Lee JangSik

Publication year - 2015

Publication title -

advanced materials

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 10.707

H-Index - 527

eISSN - 1521-4095

pISSN - 0935-9648

DOI - 10.1002/adma.201404625

Subject(s) - materials science , transistor , trapping , layer (electronics) , reliability (semiconductor) , charge (physics) , optoelectronics , nanotechnology , nanoparticle , voltage , electrical engineering , ecology , power (physics) , physics , quantum mechanics , biology , engineering

A fully feasible and versatile way to fabricate highly reliable organic‐transistor memory devices is made possible by a novel design of the charge‐trappling layer. Gold@silica (core–shell)‐structured nanoparticles are synthesized and used as the charge‐trapping layer. Superior electrical reliability is obtained because the silica shell acts as a built‐in tunnel potential barrier.

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