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Back Gated Multilayer InSe Transistors with Enhanced Carrier Mobilities via the Suppression of Carrier Scattering from a Dielectric Interface
Author(s) -
Feng Wei,
Zheng Wei,
Cao Wenwu,
Hu PingAn
Publication year - 2014
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.201402427
Subject(s) - materials science , optoelectronics , dielectric , transistor , carrier scattering , semiconductor , scattering , bilayer , substrate (aquarium) , electron mobility , threshold voltage , voltage , optics , electrical engineering , oceanography , physics , membrane , biology , geology , genetics , engineering
The back gate multilayer InSe FETs exhibit ultrahigh carrier mobilities, surpassing all the reported layer semiconductor based electronics with the same device configuration, which is achieved by the suppression of the carrier scattering from interfacial coulomb impurities or surface polar phonons at the interface of an oxidized dielectric substrate. The room‐temperature mobilities of multilayer InSe transistors increase from 64 cm 2 V −1 s −1 to 1055 cm 2 V −1 s −1 using a bilayer dielectric of poly‐(methyl methacrylate) (PMMA)/Al 2 O 3 . The transistors also have high current on/off ratios of 1 × 10 8 , low standby power dissipation, and robust current saturation in a broad voltage range.