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Flexible Electronics: Layer‐by‐Layer‐Assembled Reduced Graphene Oxide/Gold Nanoparticle Hybrid Double‐Floating‐Gate Structure for Low‐Voltage Flexible Flash Memory (Adv. Mater. 6/2013)
Author(s) -
Han SuTing,
Zhou Ye,
Wang Chundong,
He Lifang,
Zhang Wenjun,
Roy V. A. L.
Publication year - 2013
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.201370033
Subject(s) - materials science , graphene , flash memory , layer (electronics) , optoelectronics , flash (photography) , non volatile memory , nanotechnology , monolayer , flexible electronics , nanoparticle , oxide , electronics , voltage , electrical engineering , computer hardware , computer science , optics , physics , engineering , metallurgy
V. A. L. Roy and co‐workers report on page 872 a hybrid double floating gate low voltage flexible flash memory device by utilizing rGO sheets monolayer and Au NPs array as upper and lower floating gates respectively. As a buffer layer, rGO traps charges and also introduces an energy barrier between Au NPs and the channel, eventually enhancing both the retention time and memory window. The proposed memory device has been extended to flexible substrates to facilitate this method to build innovative flash memories.