z-logo
Premium
Vertical Transistor with Ultrathin Silicon Nitride Gate Dielectric
Author(s) -
Moradi Maryam,
Nathan Arokia,
Haverinen Hanna M.,
Jabbour Ghassan E.
Publication year - 2009
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.200900757
Subject(s) - materials science , silicon nitride , gate dielectric , optoelectronics , transistor , dielectric , active matrix , nitride , thin film transistor , nanoscopic scale , silicon , gate oxide , nanotechnology , layer (electronics) , electrical engineering , voltage , engineering
Nanoscale vertical thin‐film transistors (VTFTs) are fabricated employing a new ultrathin silicon nitride (SiN x ) gate dielectric for applications in high‐resolution active matrix flat panel electronics. Illustrated are the cross‐section schematic and SEM image of a 500 nm channel length VTFT with a 50 nm thick SiN x gate dielectric. The device demonstrates excellent gate control with gate leakage as low as 0.1 nA cm −2 .

This content is not available in your region!

Continue researching here.

Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom