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Write Current Reduction in Transition Metal Oxide Based Resistance Change Memory
Author(s) -
Ahn S.E.,
Lee M.J.,
Park Y.,
Kang B. S.,
Lee C. B.,
Kim K. H.,
Seo S.,
Suh D.S.,
Kim D.C.,
Hur J.,
Xianyu W.,
Stefanovich G.,
Yin H.,
Yoo I.K.,
Lee J.H.,
Park J.B.,
Baek I.G.,
Park B. H.
Publication year - 2008
Publication title -
advanced materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 10.707
H-Index - 527
eISSN - 1521-4095
pISSN - 0935-9648
DOI - 10.1002/adma.200702081
Subject(s) - materials science , non blocking i/o , current (fluid) , scaling , node (physics) , optoelectronics , oxide , nanotechnology , non volatile memory , transition metal , doping , memory cell , current density , electrical engineering , metallurgy , transistor , voltage , geometry , mathematics , catalysis , biochemistry , chemistry , engineering , structural engineering , physics , quantum mechanics
A novel memory cell structure with a Pt/Ti‐doped NiO/Pt architecture is shown to exhibit the lowest write current reported thus far for a unipolar switching resistance‐change‐based device, as shown in the figure. The write current decreases dramatically upon scaling to cell sizes smaller than 100 nm×100 nm. High‐density universal memory can be fabricated by combining this node element with a selective switch.