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2D Material Enabled Offset‐Patterning with Atomic Resolution
Author(s) -
Chen SzuHua,
Hofmann Mario,
Yen ZhiLong,
Hsieh YaPing
Publication year - 2020
Publication title -
advanced functional materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 6.069
H-Index - 322
eISSN - 1616-3028
pISSN - 1616-301X
DOI - 10.1002/adfm.202004370
Subject(s) - materials science , nanotechnology , lithography , nanoscopic scale , fabrication , graphene , nanometre , bilayer , atomic layer deposition , semiconductor , nanolithography , optoelectronics , stacking , silicon , stencil lithography , resist , thin film , layer (electronics) , electron beam lithography , membrane , medicine , alternative medicine , physics , pathology , nuclear magnetic resonance , biology , composite material , genetics
Atomic‐precision patterning at large scale is a central requirement for nanotechnology and future electronics that is hindered by the limitations of lithographical techniques. Historically, imperfections of the fabrication tools have been compensated by multi‐patterning using sequential lithography processes. The realization of nanometer‐scale features from much larger patterns through offset stacking of atomically thin masks is demonstrated. A unique mutual stabilization effect between two graphene layers produces atomically abrupt transitions that selectively expose single‐layer covered regions. Bilayer regions, on the other hand, protect the underlying substrate from removal for several hours permitting transfer of atomic thickness variations into lateral features in various semiconductors. Nanoscopic offsets between two 2D materials layers could be introduced through bottom‐up and top‐down approaches, opening up new routes for high‐resolution patterning. A self‐aligned templating approach yields nanometer‐wide bilayer graphene nanoribbons with macroscopic length that produces high‐aspect‐ratio silicon nanowalls. Moreover, offset‐transfer of lithographically patterned graphene layers enables multipatterning of large arrays of semiconductor features whose resolution is not limited by the employed lithography and could reach <10 nm feature size. The results open up a new route to combining design flexibility with unprecedented resolution at large scale.