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Energy‐Level Alignment at the Organic/Electrode Interface in Organic Optoelectronic Devices
Author(s) -
Hu Zhanhao,
Zhong Zhiming,
Chen Yawen,
Sun Chen,
Huang Fei,
Peng Junbiao,
Wang Jian,
Cao Yong
Publication year - 2016
Publication title -
advanced functional materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 6.069
H-Index - 322
eISSN - 1616-3028
pISSN - 1616-301X
DOI - 10.1002/adfm.201503420
Subject(s) - materials science , work function , organic solar cell , optoelectronics , oled , cathode , electrode , diode , dipole , interface (matter) , organic electronics , layer (electronics) , nanotechnology , voltage , electrical engineering , composite material , transistor , chemistry , polymer , engineering , organic chemistry , capillary number , capillary action
It is commonly believed that the work‐function reduction effect of the cathode interfacial material in organic electronic devices leads to better energy‐level alignment at the organic/electrode interface, which enhances the device performance. However, there is no agreement on the exact dipole direction in the literature. In this study, a peel‐off method to reveal the buried organic/metal interface to examine the energy‐level alignment is developed. By splitting the device at different interfaces, it is discovered that oppositely oriented dipoles are formed at different surfaces of the interfacial layer. Moreover, the function of the electrode interface differs in different device types. In organic light‐emitting diodes, the vacuum‐level alignment generally occurs at the organic/cathode interface, while in organic photovoltaic devices, the Fermi‐level pinning commonly happens. Both are determined by the integer charge‐transfer levels of the organic materials and the work‐function of the electrode. As a result, the performance enhancement by the cathode interfacial material in organic photovoltaic devices cannot be solely explained by the energy‐level alignment. The clarification of the energy‐level alignment not only helps understand the device operation but also sets up a guideline to design the devices with better performance.