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Realization of Boolean Logic Functionality Using Redox‐Based Memristive Devices
Author(s) -
Siemon Anne,
Breuer Thomas,
Aslam Nabeel,
Ferch Sebastian,
Kim Wonjoo,
van den Hurk Jan,
Rana Vikas,
HoffmannEifert Susanne,
Waser Rainer,
Menzel Stephan,
Linn Eike
Publication year - 2015
Publication title -
advanced functional materials
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 6.069
H-Index - 322
eISSN - 1616-3028
pISSN - 1616-301X
DOI - 10.1002/adfm.201500865
Subject(s) - resistive random access memory , von neumann architecture , xnor gate , logic gate , realization (probability) , computer science , programmable logic device , bottleneck , pass transistor logic , materials science , logic family , electronic engineering , computer hardware , electrical engineering , logic synthesis , embedded system , electronic circuit , nand gate , algorithm , engineering , mathematics , voltage , digital electronics , operating system , statistics
Emerging resistively switching devices are thought to enable ultradense passive nanocrossbar arrays for use as random access memories (ReRAM) by the end of the decade, both for embedded and mass storage applications. Moreover, ReRAMs offer inherent logic‐in‐memory (LIM) capabilities due to the nonvolatility of the devices and therefore great potential to reduce the communication between memory and calculation unit by alleviating the so‐called von Neumann bottleneck. A single bipolar resistive switching device is capable of performing 14 of 16 two input logic functions in the logic concept presented by Linn et al. (“CRS‐logic”). In this paper, five types of selectorless devices are considered to validate this CRS‐logic concept is experimentally by means of the IMP and AND logic operations. As reference device a TaO x ‐based ReRAM cell is considered, which is compared to three more advanced device configurations consisting either of a threshold supported resistive switch (TS‐ReRAM), a complementary switching device (CS), or a complementary resistive switch (CRS). It is shown that all of these devices offer the desired LIM behavior. Moreover, the feasibility of XOR and XNOR operations using a modified logic concept is applied for both CS and CRS devices and the pros and cons are discussed.