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Nanowires as Building Blocks for Self‐Assembling Logic and Memory Circuits
Author(s) -
Kovtyukhova Nina I.,
Mallouk Thomas E.
Publication year - 2002
Publication title -
chemistry – a european journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 1.687
H-Index - 242
eISSN - 1521-3765
pISSN - 0947-6539
DOI - 10.1002/1521-3765(20021004)8:19<4354::aid-chem4354>3.0.co;2-1
Subject(s) - nanowire , materials science , nanotechnology , electronic circuit , semiconductor , monolayer , template , optoelectronics , electrical engineering , engineering
The concept of assembling electronic circuits from metal nanowires is discussed. These nanowires are synthesised electrochemically by using porous membranes as templates. High aspect ratio wires, which range from 15 to 350 nm in diameter and contain “stripes” of different metals, semiconductors, colloid/polymer multilayers, and self‐assembling monolayers have been made by this technique. By using the distinct surface chemistry of different stripes, the nanowires can be selectively derivatized and positioned on patterned surfaces. This allows the current–voltage properties of single and crossed nanowire devices to be measured. Nanowire conductors, rectifiers, switches, and photoconductors have been characterized. Techniques are still being developed for assembling sublithographic scale nanowires into cross‐point arrays for memory and logic applications.