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A VLSI placement method using genetic algorithm considering hierarchical structure of solution space
Author(s) -
Koakutsu Seiichi,
Urushida Yuji,
Hirata Hironori
Publication year - 2000
Publication title -
electrical engineering in japan
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.136
H-Index - 28
eISSN - 1520-6416
pISSN - 0424-7760
DOI - 10.1002/(sici)1520-6416(20000415)131:1<86::aid-eej9>3.0.co;2-5
Subject(s) - very large scale integration , crossover , genetic algorithm , space (punctuation) , algorithm , computation , computer science , encoding (memory) , mathematics , mathematical optimization , artificial intelligence , embedded system , operating system
This paper proposes a new VLSI placement method using genetic algorithm considering the hierarchical structure of solution space. In the proposed method, we introduce a special solution encoding which represents the hierarchical structure of solution space, and new crossover operators which can maintain the hierarchical structure of the encoded solution. Making use of the hierarchical nature of the solution space, the proposed method can search the solution space efficiently. We demonstrate the efficiency of the proposed method by applying it to VLSI cell placement problems. Computational experiments show that the proposed method obtains better placement results within less computation time compared with conventional genetic algorithm. © 2000 Scripta Technica, Electr Eng Jpn, 131(1): 86–93, 2000