Premium
νMOS cellular‐automaton circuit for picture thinning and shrinking
Author(s) -
Ikebe Masayuki,
Kameishi Koji,
Amemiya Yoshihito
Publication year - 1999
Publication title -
electrical engineering in japan
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.136
H-Index - 28
eISSN - 1520-6416
pISSN - 0424-7760
DOI - 10.1002/(sici)1520-6416(199902)126:3<41::aid-eej5>3.0.co;2-0
Subject(s) - cellular automaton , electronic circuit , computer science , electronic engineering , electrical engineering , algorithm , engineering
In this study we propose a design for an LSI circuit that implements a cellular automaton. The cellular automaton is a parallel and distributed architecture device suitable for high‐speed image processing. To develop a cellular automaton LSI circuit, it is necessary to design small‐size unit cell circuits that can operate according to cell–cell interaction rules. We propose to use νMOSFET devices for such cell circuits. Template matching is implemented by combining multiple input νMOSFET circuits and inverters. A cell circuit was designed for image thinning and shrinking, and its operation was analyzed using a circuit simulator. It was demonstrated that high speed operation (up to 100 MHz clock frequency) can be obtained. © 1999 Scripta Technica, Electr Eng Jpn, 126(3): 41–48, 1999