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Device simulation of carrier lifetime‐controlled GTO
Author(s) -
Sugimoto Kenji,
Sakata Hiroshi,
Isomura Shigehiro
Publication year - 1997
Publication title -
electrical engineering in japan
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.136
H-Index - 28
eISSN - 1520-6416
pISSN - 0424-7760
DOI - 10.1002/(sici)1520-6416(19970415)119:1<82::aid-eej10>3.0.co;2-y
Subject(s) - thyristor , materials science , carrier lifetime , semiconductor device , optoelectronics , irradiation , power electronics , semiconductor , electronics , power semiconductor device , electrical engineering , engineering physics , engineering , nanotechnology , silicon , physics , voltage , layer (electronics) , nuclear physics
Recent development of power semiconductor devices has produced remarkable advances in power electronics. Among them, the gate turn‐off thyristor (GTO) is one of the most important devices. Carrier lifetime‐controlled devices have been proposed recently to realize low turn‐off switching loss. Thus, computer simulation for the device is now necessary to predict its characteristics. In this study, we simulated a carrier lifetime‐controlled GTO with the FEM program. Lifetime control, such as heavy metal diffusion and electron beam irradiation, showed a trade‐off relation between on‐state and turn‐off conditions. Partial lifetime control, which generates lattice defects locally by light ion irradiation, showed the possibility of reducing turn‐off loss and improving the trade‐off relations. Furthermore, the numerical analyses showed relations between the location of the irradiated point and variations of the internal carrier distributions. © 1997 Scripta Technica, Inc. Electr Eng Jpn 119(1): 82–89.