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AN ANALYSIS OF A SEMICONDUCTOR EXPERIMENT USING YIELD AND SPATIAL INFORMATION
Author(s) -
Ramírez José G.,
Cantell Brenda
Publication year - 1997
Publication title -
quality and reliability engineering international
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.913
H-Index - 62
eISSN - 1099-1638
pISSN - 0748-8017
DOI - 10.1002/(sici)1099-1638(199701)13:1<35::aid-qre67>3.0.co;2-d
Subject(s) - overdispersion , statistic , statistics , spatial analysis , yield (engineering) , regression analysis , logistic regression , complement (music) , computer science , mathematics , econometrics , data mining , negative binomial distribution , biochemistry , materials science , chemistry , complementation , metallurgy , poisson distribution , gene , phenotype
Semiconductor yield data is binary by nature since an integrated circuit (IC), or die, can only pass or fail a particular test. Still, many people rely on simple linear regression to analyse this type of data, which can produce incorrect results, e.g. negative yield predictions. We discuss the use of logistic regression for the analysis of yield data, and show that even this approach has to be modified to take into account the phenomenon of overdispersion. We present several approaches to accommodate overdispersion. We also discuss a statistic for measuring the spatial dependence of ICs within a wafer, the spatial log‐odds ratio, which provides additional information to complement a yield analysis. These ideas are demonstrated using an example from our manufacturing area. © 1997 by John Wiley & Sons, Ltd.