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A study of side gate test structures in InAlAs/InGaAs HEMTs for optoelectronic circuit applications
Author(s) -
Berthelemot C.,
Farrenq A.,
Vigier P.,
Dumas J.M.,
Clei A.,
Palla R.,
Harmand J.C.
Publication year - 1996
Publication title -
quality and reliability engineering international
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.913
H-Index - 62
eISSN - 1099-1638
pISSN - 0748-8017
DOI - 10.1002/(sici)1099-1638(199607)12:4<321::aid-qre27>3.0.co;2-k
Subject(s) - high electron mobility transistor , optoelectronics , materials science , gallium arsenide , transistor , electrical engineering , engineering , voltage
The InAlAs/InGaAs HEMT is a key electron device used in optoelectronic integrated circuits (OEICs) operating in the 1·3 and 1·5 μm optical wavelength ranges. OEIC performances can be degraded by side‐gating effects associated with the HEMT. A side gate current is evidenced and demonstrated to be (i) due to a hole current induced by an impact ionization mechanism into the HEMT InGaAs channel and flowing through the InAlAs buffer layer and (ii) strongly dependent on the side gate test structure geometries and types of contacts. Finally, an optimized structure for monolithic integration is presented together with requirements on the operating point.