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Peripheral loss reduction of high efficiency silicon solar cells by MOS gate passivation, by poly‐Si filled grooves and by cell pattern design
Author(s) -
Zhao Jianhua,
Wang Aihua,
Altermatt Pietro P.,
Zhang Guangchun
Publication year - 2000
Publication title -
progress in photovoltaics: research and applications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.286
H-Index - 131
eISSN - 1099-159X
pISSN - 1062-7995
DOI - 10.1002/(sici)1099-159x(200003/04)8:2<201::aid-pip288>3.0.co;2-v
Subject(s) - passivation , perl , materials science , optoelectronics , solar cell , common emitter , silicon , crystalline silicon , nanotechnology , computer science , layer (electronics) , world wide web
This paper reports a variety of methods to reduce the peripheral or edge losses in high efficiency silicon PERL (Passivated Emitter, Rear Locally‐diffused) cells. A MOS (Metal Oxide Semiconductor) structure was investigated as a way to passivate the peripheral region of high efficiency PERL silicon solar cells, when this region is shaded during cell measurement. A marginal gain in the cell short‐circuit current has been observed when a positive voltage is applied to the MOS gate at the cell peripheral region. When a negative bias is applied to the gate, a current loss, a significant gain in the cell fill factors and a marginal gain in cell efficiency have been observed. Two‐dimensional numerical modelling has been used to analyse this performance. Although the model has predicted a similar trend, it can not fully fit to the experimental data. A weakly inverted surface channel may have resulted in the fill factor change. A higher efficiency gain is predicted if the surface channel can be eliminated. Other experimental methods to passivate scribed PERL cells are also discussed in this paper. Laser‐cut grooves filled with poly‐silicon at the cell edges have resulted in an improved cell performance after cell peripheral regions have been scribed off. Special design of the cells for a shingled array application has also significantly improved the cell performance, and made it possible to demonstrate 23·7% efficiency on a 21·6 cm 2 large area, scribed silicon cell. Copyright © 2000 John Wiley & Sons, Ltd.