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PARALLEL FRAME SYNCHRONOUS SCHEME FOR STM‐1 IN SDH NETWORKS
Author(s) -
TENG JUN,
LI LEIMIN,
OBAIDAT M. S.
Publication year - 1996
Publication title -
international journal of communication systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.344
H-Index - 49
eISSN - 1099-1131
pISSN - 1074-5351
DOI - 10.1002/(sici)1099-1131(199609)9:5<229::aid-dac312>3.0.co;2-1
Subject(s) - computer science , scheme (mathematics) , frame (networking) , megabit , electronic circuit , frame rate , real time computing , computer network , telecommunications , electrical engineering , mathematical analysis , mathematics , artificial intelligence , engineering
Abstract This paper presents a novel parallel processing‐based frame synchronous methodology for 155·520 Mbit/s high speed networks according to ITU‐T Recommendations G.707, G.708 and G.709. This scheme is expected to relax operating speed requirements of the circuits used in the system. The proposed methodology can be implemented using off‐the‐shelf low‐rate integrated circuits (ICs). The performance of the devised methodology is analysed and found to be similar to that of traditional approaches. Finally, the proposed scheme is efficient and easy to implement at low cost without sacrificing performance.