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Modeling of chip resistors for high‐frequency microwave applications with the use of the FD‐TD method
Author(s) -
Lau Y. C.,
Leong M. S.,
Kooi P. S.
Publication year - 1997
Publication title -
microwave and optical technology letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.304
H-Index - 76
eISSN - 1098-2760
pISSN - 0895-2477
DOI - 10.1002/(sici)1098-2760(19970405)14:5<259::aid-mop1>3.0.co;2-c
Subject(s) - resistor , resistive touchscreen , microstrip , microwave , planar , chip , electronic engineering , electrical engineering , engineering , materials science , optoelectronics , computer science , voltage , telecommunications , computer graphics (images)
The FD‐TD method was used to model physical chip resistors with the use of the lumped‐element concept. Instead of using the conventional planar resistive elements approximation, we modeled the substrate on which the resistive element is fabricated as well. Comparing our numerical results with experimental measurements performed on chip resistors of representative values of 10 and 820 O, we have found that our model significantly outperforms the present planar scheme for frequencies up to 20 GHz. As an application of our chip‐resistor model, we have investigated a microstrip power divider / combiner with isolation resistor. © 1997 John Wiley & Sons, Inc. Microwave Opt Technol Lett 14:259–261, 1997.