
VLSI Implementation of High Resolution High Speed Low Latency Pipeline Floating point Adder/Subtractor for FFT Applications
Author(s) -
Rozita Teymourzadeh,
Burhan Yeop Majlis,
Mok Vh,
Masuri Othman
Publication year - 2009
Publication title -
hal (le centre pour la communication scientifique directe)
Language(s) - English
Resource type - Conference proceedings
Subject(s) - subtractor , adder , pipeline (software) , computer science , very large scale integration , fast fourier transform , low latency (capital markets) , latency (audio) , floating point , high resolution , electronic engineering , parallel computing , computer hardware , embedded system , engineering , telecommunications , algorithm , computer network , remote sensing , programming language , geology