Open AccessLogic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality
Author(s) -
Beck, Matthias,
Olivier Barondeau,
Martin Kaibel,
Poehl, Frank,
Lin, Xijiang,
Ron Press
Publication year - 2005
Publication title -
hal (le centre pour la communication scientifique directe)
Language(s) - English
Resource type - Conference proceedings
Subject(s) - automatic test pattern generation , chip , computer science , test compression , logic synthesis , design for testing , system on a chip , test (biology) , logic gate , clock rate , embedded system , computer hardware , electronic engineering , reliability engineering , engineering , electronic circuit , electrical engineering , telecommunications , algorithm , paleontology , testability , biology
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