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An Approach Combining Simulation and Verification for SysML using SystemC and Uppaal
Author(s) -
Abbas Abdulazeez Abdulhameed,
Ahmed Hammad,
Hassan Mountassir,
Bruno Tatibouët
Publication year - 2014
Publication title -
hal (le centre pour la communication scientifique directe)
Language(s) - English
Resource type - Conference proceedings
Subject(s) - systemc , systems modeling language , computer science , transaction level modeling , process (computing) , formal verification , unified modeling language , model checking , electronic system level design and verification , software engineering , embedded system , programming language , systems engineering , software , engineering

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