
Simulation-based validation of VHDL descriptions using constraints logic programming
Author(s) -
Christophe Paoli,
Marie Laure Nivet,
Fabrice Bernardi,
Laurent Capocchi,
Umr Cnrs
Publication year - 2004
Publication title -
hal (le centre pour la communication scientifique directe)
Language(s) - English
Resource type - Conference proceedings
Subject(s) - vhdl , computer science , programming language , logic programming , code generation , code (set theory) , theoretical computer science , embedded system , field programmable gate array , computer security , set (abstract data type) , key (lock)