Open AccessHow to Implement an Asynchronous Test Wrapper for Network-on-Chip Nodes
Author(s) -
XuanTu Tran,
Jean Durupt,
F. Bertrand,
Vincent Beroulle,
Chantal Robach
Publication year - 2007
Publication title -
hal (le centre pour la communication scientifique directe)
Language(s) - English
Resource type - Conference proceedings
Subject(s) - asynchronous communication , computer science , network on a chip , scalability , computer architecture , node (physics) , testability , embedded system , design for testing , asynchronous circuit , asynchronous system , system on a chip , distributed computing , computer network , engineering , operating system , telecommunications , reliability engineering , structural engineering , clock signal , synchronous circuit , jitter