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Reducing Average and Peak Temperatures of VLSI CMOS Digital Circuits by Means of Heuristic Scheduling Algorithm
Author(s) -
Wladyslaw Szczesniak
Publication year - 2007
Publication title -
hal (le centre pour la communication scientifique directe)
Language(s) - English
Resource type - Conference proceedings
Subject(s) - very large scale integration , computer science , cmos , heuristic , digital electronics , electronic circuit , scheduling (production processes) , processor scheduling , parallel computing , algorithm , electronic engineering , mathematical optimization , embedded system , electrical engineering , mathematics , engineering , artificial intelligence , schedule , operating system

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