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Hardware cost evaluation of the posit number system
Author(s) -
Luc Forget,
Yohann Uguen,
Florent de Dinechin
Publication year - 2019
Publication title -
hal (le centre pour la communication scientifique directe)
Language(s) - English
Resource type - Conference proceedings
Subject(s) - adder , computer science , accumulator (cryptography) , field programmable gate array , floating point , arithmetic , ieee floating point , computer hardware , floating point unit , multiplier (economics) , single precision floating point format , overhead (engineering) , encoding (memory) , parallel computing , latency (audio) , algorithm , mathematics , artificial intelligence , telecommunications , economics , macroeconomics , operating system

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