A DEVS-based Modeling Behavioral Fault Simulator for RT-Level Digital Circuits | Zendy

Laurent Capocchi | Zendy; Fabrice Bernardi | Zendy; Dominique Fédérici | Zendy; Paul-Antoine Bisgambiglia | Zendy

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A DEVS-based Modeling Behavioral Fault Simulator for RT-Level Digital Circuits

Author(s) -

Laurent Capocchi,

Fabrice Bernardi,

Dominique Fédérici,

Paul-Antoine Bisgambiglia

Publication year - 2004

Publication title -

hal (le centre pour la communication scientifique directe)

Language(s) - English

Resource type - Conference proceedings

Subject(s) - devs , correctness , fault simulator , computer science , vhdl , automatic test pattern generation , behavioral modeling , digital electronics , logic simulation , electronic circuit simulation , fault model , formalism (music) , hardware description language , fault injection , discrete event simulation , fault coverage , fault (geology) , simulation , stuck at fault , electronic circuit , embedded system , modeling and simulation , algorithm , fault detection and isolation , software , logic gate , engineering , programming language , field programmable gate array , artificial intelligence , actuator , seismology , electrical engineering , geology , art , visual arts , musical

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