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Challenges and Resolution for Copper Wirebonding on Tapeless Leadframe Chip-on-Lead Technology
Author(s) -
Antonio R. Sumagpang,
Frederick Ray I. Gomez
Publication year - 2018
Publication title -
journal of engineering research and reports
Language(s) - English
Resource type - Journals
ISSN - 2582-2926
DOI - 10.9734/jerr/2018/v3i216869
Subject(s) - wire bonding , root cause , complaint , quality (philosophy) , dilemma , lead (geology) , product (mathematics) , chip , manufacturing engineering , root cause analysis , process (computing) , key (lock) , lead time , reliability engineering , computer science , engineering , operations management , telecommunications , computer security , philosophy , geometry , mathematics , epistemology , geomorphology , law , political science , geology , operating system
This technical paper discusses a methodological and systematic way of resolving key challenges during introduction of Chip-On-Lead package specifically wirebonding issues that leads to production dilemma during production ramp-up of products using copper wire in tapeless leadframe. The project was intended to determine the “Red-X” or the major cause of yield detractors that may lead to quality issue during wirebonding process. Problem solving tools were showcased in this paper such as Data Analysis, Cause and Effect, Design-of–Experiment (DOE) and mechanical dimensional analysis which provided substantial impact in determining the real root-cause of the problem. Step-by-step elimination of variables was achieved with the use of statistical engineering tools. Outcome of the project eliminated the occurrence of Non-Stick-On-Pad (NSOP) during wirebonding process without cost involved and just optimizing the available in-house resources. The improvements also enhanced the quality of the product after final test which on the other hand lower the risk of having potential customer complaint in the future. Original Research Article Sumagpang Jr. and Gomez; JERR, 3(2): 1-13, 2018; Article no.JERR.46080 2

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