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Binary phase shift keying (BPSK) and quadrature phase shift Keying (QPSK)modulation techniques are often proposed for satellite communications and band-limited communication channels; however, both modulations are important in high speed data communications. High speed data communications are implemented on high speed hardware in wireless systems. The paper presents the design of a QPSK and BPSK digital communication modulators and their implementations on high speed field-programmable gate array (FPGA) using Quartus II. Also, for these modulation schemes, resource utilization was introduced. Both modulations were designed in Quartus II using VHDL hardware description language. It was shown that transmission of QPSK modulator is fast than transmission of BPSK modulator at the same bit error performance. According to BPSK, QPSK modulator uses more memory. But other resources equal to for these modulation. Principles of the BPSK modulation and QPSK modulation are illustrated using schematic diagrams. The analysis of theoretical aspects of the BPSK and QPSK modulations are represented. Both modulations waveforms are illustrated using a simulation program. Implementations of the BPSK and QPSK systems on FPGA are shown using algorithms of modulator.       Key words: Binary phase shift keying (BPSK), quadrature phase shift Keying (QPSK), field-programmable gate array (FPGA).

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Field-programmable gate array (FPGA)-based designed using VHDL hardware description language transmission performance analysis of binary phase shift keying (BPSK) and quadrature phase shift Keying (QPSK) modulators