Performance Analysis of Various Readout Circuits for Monitoring Quality of Water Using Analog Integrated Circuits

This paper presents a comparative performance study of various analog integrated circuits (namely CC-II, DVCC, CDBA and CDTA) used with ISFET for monitoring the quality of water. The use of these active components makes the implementation simple and attractive. The functionality of the circuits are tested using Tanner simulator version 15 for a 70nm CMOS process model also the transfer functions realization for each is done on MATLAB R2011a version, the Very high speed integrated circuit Hardware description language(VHDL) code for all scheme is simulated on Xilinx ISE 10.1 and various simulation results are obtained and its is found that DVCC is most stable and consume maximum power whereas CC-II is the least stable and consumes minimum power amongst all the four deployed analog IC's. Detailed simulation results are included in the paper to give insight into the research work carried out.