z-logo
open-access-imgOpen Access
Optimized Low Power Dual Edge Triggered Flipflop with Speed Enhancement
Author(s) -
Shilpa K.C,
C Lakshminarayana
Publication year - 2022
Publication title -
international journal of image graphics and signal processing
Language(s) - English
Resource type - Journals
eISSN - 2074-9082
pISSN - 2074-9074
DOI - 10.5815/ijigsp.2022.01.05
Subject(s) - flip flop , computer science , enhanced data rates for gsm evolution , power (physics) , cmos , signal edge , transistor , electronic engineering , electrical engineering , voltage , computer hardware , telecommunications , engineering , digital signal processing , physics , quantum mechanics , analog signal

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom