Development of a CMOS SOI pixel detector
Author(s) -
Ishino, Hirokazu,
Arai, Y,
Hazumi, M,
Ikegami, Y,
Kohriki, T,
Tajima, O,
Terada, S,
Tsuboyama, T,
Unno, Y,
Ushiroda, Y,
Ikeda, H,
Hara, K,
Ishino, H,
Kawasaki, T,
Miyake, H,
Martin, E,
Varner, G,
Tajima, H,
Ohno, M,
Fukuda, K,
Komatsubara, H,
Ida, J
Publication year - 2007
Language(s) - English
DOI - 10.5170/cern-2007-001.263
Subject(s) - detectors and experimental techniques
We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 m fullydepleted- SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5mm2 consisting of 20 x 20 um2 pixels have been designed and manufactured. Performance tests with a laser light illumination and a . ray radioactive source indicate successful operation of the detector. We also brie y discuss the back gate effect as well as the simulation study
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