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In today’s world , power dissipation is one of the major concern as the complexity of the chip is increasing and more devices are being integrated on a single chip. Thus this high density of chip and increased power dissipation demands for better power optimization methods. Reversible logic is one of the method to reduce power dissipation. Reversible computing has a wide number of applications in areas of advance computing such as low power CMOS VLSI design, nanotechnology, cryptography, optical computing, DNA computing and quantum computing. This paper presents improved and logic efficient reversible four bit carry skip adder block. The performance of the proposed architecture is better in terms of number of transistors, garbage outputs, constant inputs and gate count when compared with existing works. Also the design forms the basis for different quantum ALU and reversible processors.

Transistor Realization of Reversible Carry Skip Adder Circuits