Design of CMOS based Transimpedance Amplifier for Bandwidth Enhancement with Large Gain

This paper present a differential architecture of cmos transimpedance amplifier is offered to obtained the input capacitive load in-sensitive and the very minimum noise structure. The suggested TIA is dependent on the differential structure and composed of a regulated cascode block and a differential amplifier along with active feedback. To increase the bandwidth of the amplifier series inductive peaking and a capacitive degeneration step employed. Simulation results shows that the TIA achieves 100 GHz bandwidth, 80.4 dBΩ transimpedance gain, and 20 pA/ Hz of the input referred noise current, and it dissipates 10 mW under 1.2V supply. Theproposed TIA increases the bandwidth by more than two times when compared with other existing CMOS TIAs, while achieving comparable performance in other performance metrics.