A Survey Paper on Design and Implementation for Voltage Drop in CMOS Rectifier | Zendy

Himshikha Sharma | Zendy; Braj Bihari | Zendy

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A Survey Paper on Design and Implementation for Voltage Drop in CMOS Rectifier

Author(s) -

Himshikha Sharma,

Braj Bihari

Publication year - 2016

Publication title -

international journal of computer applications

Language(s) - English

Resource type - Journals

ISSN - 0975-8887

DOI - 10.5120/ijca2016908839

Subject(s) - computer science , cmos , rectifier (neural networks) , drop (telecommunication) , voltage drop , electrical engineering , voltage , telecommunications , artificial intelligence , engineering , stochastic neural network , recurrent neural network , artificial neural network

This paper presents the study and survey analysis on different width size of transistor in CMOS rectifier for output voltage drop. The paper gives information about miniaturizing the CMOS rectifier using two PMOS and NMOS configuration. This investigation focuses on the effect of the width-to-length ratio by using 0.35μm technology. Therefore, increase the width size and minimize the internal resistance. The model is operated at a frequency of 50Hz with an AC voltage source. CADENCE software is used for simulation and designing work.

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