A Survey Paper on Implementing MTCMOS Technique in Full Subtractor Circuit
Author(s) -
Tanvi Nagariya,
Braj Bihari
Publication year - 2016
Publication title -
international journal of computer applications
Language(s) - English
Resource type - Journals
ISSN - 0975-8887
DOI - 10.5120/ijca2016908824
Subject(s) - computer science , subtractor , computer hardware , telecommunications , adder , latency (audio)
paper presents the study and survey analysis of Full Subtractor circuit on implementing the MTCMOS technique. Full Subtractor is a combinational circuit that performs subtraction and results in difference and borrows outputs. Implementing the MTCMOS technique on this circuit results in reduction of both leakage current and power consumption.
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