A Scheduling Algorithm for Asymmetric Processor Architecture | Zendy

S. Subha | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

A Scheduling Algorithm for Asymmetric Processor Architecture

Author(s) -

S. Subha

Publication year - 2010

Publication title -

international journal of computer applications

Language(s) - English

Resource type - Journals

ISSN - 0975-8887

DOI - 10.5120/1623-2182

Subject(s) - computer science , architecture , scheduling (production processes) , parallel computing , algorithm , distributed computing , mathematical optimization , art , mathematics , visual arts

multiprocessors are used widely today. The cores in a chip can be homogeneous or heterogeneous. This paper proposes a scheduling algorithm for heterogeneous multiprocessors wotj, multiple functional units of varying speed in each processor. Instructions that can be scheduled in parallel are considered. An optimization function is developed to allocate the processes to the processors that minimize the overall execution time. The proposed model is simulated for a chosen example and verified to give 46% improvement in performance.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research