A 1. 5-V, 10-bit, 200-MS/s CMOS Pipeline Analog-to-Digital Converter | Zendy

Manju Devi | Zendy; Arunkumar P Chavan | Zendy; K N Muralidhara | Zendy

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A 1. 5-V, 10-bit, 200-MS/s CMOS Pipeline Analog-to-Digital Converter

Author(s) -

Manju Devi,

Arunkumar P Chavan,

K N Muralidhara

Publication year - 2014

Publication title -

international journal of computer applications

Language(s) - English

Resource type - Journals

ISSN - 0975-8887

DOI - 10.5120/15366-3869

Subject(s) - computer science , bit (key) , pipeline (software) , cmos , analog to digital converter , 12 bit , digital to analog converter , successive approximation adc , computer hardware , electrical engineering , electronic engineering , capacitor , computer security , operating system , voltage , engineering

Analog-to-digital converters (ADCs) are required in almost all communication and signal processing applications. This paper describes a 1.5-v, 10-bit, 200-Msample/s pipeline analog-todigital converter in 0.18-μm CMOS technology. The entire circuit architecture is built with a modular approach consisting of identical units organized into an easily expandable pipeline chain. The converter uses ten stage pipelined architecture with fully differential analog circuits, with a full-scale sinusoidal input at 10 MHz’s A special focus is made on pipelined ADC for its superior performance in terms of speed and resolution. General Terms Op-amp, Flip-flop, Adders,

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