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The Events Priority in the nMPRA and Consumption of Resources Analysis on the FPGA
Author(s) -
E.-E. CIOBANU
Publication year - 2018
Publication title -
advances in electrical and computer engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.254
H-Index - 23
eISSN - 1844-7600
pISSN - 1582-7445
DOI - 10.4316/aece.2018.01017
Subject(s) - pipeline (software) , computer science , task (project management) , field programmable gate array , register (sociolinguistics) , architecture , embedded system , pipeline transport , operating system , parallel computing , engineering , geography , linguistics , philosophy , systems engineering , archaeology , environmental engineering
The MPRA (Multi Pipeline Register Architecture) was modified and converted into n-task MPRA (nMPRA) by replicating the pipeline registers. While the original MPRA provided hardware sch ...

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