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New Approach of QoS Metric Modeling on Network on Chip
Author(s) -
Salem Nasri
Publication year - 2011
Publication title -
international journal of communications network and system sciences
Language(s) - English
Resource type - Journals
eISSN - 1913-3723
pISSN - 1913-3715
DOI - 10.4236/ijcns.2011.45040
Subject(s) - computer science , quality of service , computer network , network packet , network on a chip , metrics , routing (electronic design automation) , packet loss , metric (unit) , distributed computing , routing protocol , static routing , engineering , operations management
This paper presents a new NoC QoS metrics modeling shaped on mesh architecture. The new QoS model is based on the QoS parameters. The goal of this work is to quantify buffering requirements and packet switching techniques in the NoC nodes by analyzing some QoS metrics such as End-to-End delays (EEDs) and packet loss. This study is based on simulation approach of a 4 × 4 mesh NoC behavior under multimedia communication process. It proposes a study of NoC switching buffer size avoiding packet drop and minimizing EED. Mainly, we focus on percent flit losses due to buffer congestion for a network loading. This leads to identify the optimal buffer size for the switch design. The routing approach is based on the Wormhole Routing method

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