Reliability of High Speed Ultra Low Voltage Differential CMOS Logic | Zendy

Omid Mirmotahari | Zendy; Yngvar Berg | Zendy

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Reliability of High Speed Ultra Low Voltage Differential CMOS Logic

Author(s) -

Omid Mirmotahari,

Yngvar Berg

Publication year - 2015

Publication title -

circuits and systems

Language(s) - English

Resource type - Journals

eISSN - 2153-1293

pISSN - 2153-1285

DOI - 10.4236/cs.2015.65013

Subject(s) - inverter , cmos , reliability (semiconductor) , electronic engineering , differential (mechanical device) , transistor , voltage , computer science , electrical engineering , engineering , physics , power (physics) , quantum mechanics , aerospace engineering

In this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present a differential ULV inverter and elaborate on the reliability and fault tolerance of the gate. The differential ULV gate compared to both a former ULV gate and standard CMOS are given. The results are obtained through Monte-Carlo simulations

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