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Analysis of Power Reduction Techniques used in Testing of VLSI Circuits
Author(s) -
Shaktisinh Karnubha Jadeja,
Rajendra Pate
Publication year - 2015
Publication title -
journal of electrical and electronic systems
Language(s) - English
Resource type - Journals
ISSN - 2332-0796
DOI - 10.4172/2332-0796.1000148
Subject(s) - very large scale integration , electronic circuit , reduction (mathematics) , computer science , power (physics) , electronic engineering , electrical engineering , engineering , embedded system , physics , mathematics , geometry , quantum mechanics

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