Pushing the 3rd Dimension – Floppy Wafers, Die and Packages? Stress Induced Chip Package Interactions on Thin Mobile Devices | Zendy

Mark Nakamoto | Zendy; Wei Zhao | Zendy; Riko Radojcic | Zendy

Open Access

Pushing the 3rd Dimension – Floppy Wafers, Die and Packages? Stress Induced Chip Package Interactions on Thin Mobile Devices

Author(s) -

Mark Nakamoto,

Wei Zhao,

Riko Radojcic

Publication year - 2012

Publication title -

imapsource proceedings

Language(s) - English

Resource type - Journals

ISSN - 2380-4505

DOI - 10.4071/isom-2012-thp46

Subject(s) - chip scale package , mobile device , reliability (semiconductor) , die (integrated circuit) , chip , system in package , stress (linguistics) , wafer , computer science , embedded system , engineering , electrical engineering , telecommunications , operating system , power (physics) , physics , linguistics , philosophy , quantum mechanics

Ever thinner form factors for smart phones, tablets and other mobile devices are driving an aggressive scaling of the semiconductor devices/packages that enable them. A survey of the challenges of this trend points to mechanical stress as the major challenge apart from handling damage. Stress driven Chip Package Interactions impact the manufacturing flow, performance and the reliability of the finished product. We examine a number of the factors and risks driven by mechanical stress and discuss some ideas on how to manage and monitor these issues.

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