Packaging and Integration Concept for High-Performance and Cost-effective IQM-based Transmitter Module for 160 Gb/s Applications
Author(s) -
Giovanni Delrosso,
Brian Curran,
M. Rothermund,
Uwe Maaß,
Hermann Oppermann,
Ivan Ndip
Publication year - 2011
Publication title -
imapsource proceedings
Language(s) - English
Resource type - Journals
ISSN - 2380-4505
DOI - 10.4071/isom-2011-ta5-paper6
Subject(s) - ball grid array , transmitter , electronic engineering , chip , computer science , wavelength division multiplexing , gigabit , flip chip , engineering , electrical engineering , materials science , optoelectronics , wavelength , channel (broadcasting) , soldering , composite material , adhesive , layer (electronics)
Photonic packaging and interconnection design of Polarization Multiplexed RZ-DQPSK format are actually gaining interests because of the urgent need to fit 100+ Gbit/s channels into existing DWDM systems, with the associated advantage to use driving electronics at the effective speed-rate needed for each driving port. However, packaging and integration of IQM (In-phase/Quadrature Modulator) chips for 100+Gb/s applications poses huge design and process challenges. In this contribution, we present a systematic concept for efficient and cost-effective packaging and integration of a 4 × 43 Gb/s Polmux RZ-DQPSK transmitter module for 160 Gb/s applications. This concept takes into consideration electrical and thermo-mechanical design challenges right at the beginning of the design cycle, so as to prevent any system failure or possible re-designs. The two InP IQM chips are flip-chip bonded on a BGA-based ceramic package, preserving signal integrity, simplifying routing and dramatically minimizing overall size and assembly costs.
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