Thermal Performance of 3D IC Integration with Through-Silicon Via (TSV) | Zendy

Heng-Chieh Chien | Zendy; John H. Lau | Zendy; FangLin Chao | Zendy; Ra-Min Tain | Zendy; Ming-Ji Dai | Zendy; Sheng-Tsai Wu | Zendy; WeiChung Lo | Zendy; MingJer Kao | Zendy

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Thermal Performance of 3D IC Integration with Through-Silicon Via (TSV)

Author(s) -

Heng-Chieh Chien,

John H. Lau,

FangLin Chao,

Ra-Min Tain,

Ming-Ji Dai,

Sheng-Tsai Wu,

WeiChung Lo,

MingJer Kao

Publication year - 2012

Publication title -

journal of microelectronics and electronic packaging

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.192

H-Index - 17

eISSN - 1555-8037

pISSN - 1551-4897

DOI - 10.4071/imaps.309

Subject(s) - three dimensional integrated circuit , through silicon via , thermal conductivity , passivation , materials science , thermal , equivalent circuit , electronic engineering , integrated circuit , silicon , heat transfer , optoelectronics , composite material , mechanical engineering , electrical engineering , engineering , mechanics , thermodynamics , voltage , physics , layer (electronics)

Thermal performance of 3D IC integration is investigated in this study. Emphasis is placed on the determination of a set of equivalent thermal conductivity equations for Cu-filled TSVs with various TSV diameters, TSV pitches, TSV thicknesses, passivation thicknesses, and microbump pads. Also, the thermal behavior of a TSV cell is examined. Furthermore, 3D heat transfer simulations are adopted to verify the accuracy of the equivalent equations. Finally, the feasibility of these equivalent equations is demonstrated through a simple 3D IC integration structure.

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