z-logo
open-access-imgOpen Access
Irregular Class of Multistage Interconnection Network in Parallel Processing
Author(s) -
Sandeep Sharma,
Karanjeet Singh Kahlon,
Prateek Bansal,
Kawaljeet Singh
Publication year - 2008
Publication title -
journal of computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.161
H-Index - 28
eISSN - 1552-6607
pISSN - 1549-3636
DOI - 10.3844/jcssp.2008.220.224
Subject(s) - computer science , interconnection , class (philosophy) , parallel computing , multistage interconnection networks , parallel processing , computer network , distributed computing , artificial intelligence
A major problem in designing a large-scale parallel and distributed system was the construction of an Interconnection Network (IN) to provide inter-processor communication. One of the biggest issues in the development of such a system was the development of an effective architecture and algorithms that have high reliability, give good performance (even in the presence of faults), low cost, low average path length, higher number of passes of request and a simple control. In this study, a new class of Irregular Fault Tolerant Multistage Interconnection Network (MIN) called Improved Four Tree (IFT) is introduced. Algorithms for computing the cost and permutations passable in the presence and absence of fault are developed for the analysis of various networks with proposed network

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom