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Probabilistic Soft Error Detection Based on Anomaly Speculation
Author(s) -
Joonhyuk Yoo
Publication year - 2011
Publication title -
journal of information processing systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.288
H-Index - 23
eISSN - 2092-805X
pISSN - 1976-913X
DOI - 10.3745/jips.2011.7.3.435
Subject(s) - computer science , soft error , speculation , probabilistic logic , workload , fault tolerance , reliability (semiconductor) , anomaly (physics) , fault (geology) , reliability engineering , parallel computing , embedded system , distributed computing , power (physics) , electronic engineering , artificial intelligence , operating system , physics , quantum mechanics , seismology , geology , engineering , economics , macroeconomics , condensed matter physics
Microprocessors are becoming increasingly vulnerable to soft errors due to the current trends of semiconductor technology scaling. Traditional redundant multi-threading architectures provide perfect fault tolerance by re-executing all the computations. However, such a full re-execution technique significantly increases the verification workload on the processor resources, resulting in severe performance degradation. This paper presents a pro-active verification management approach to mitigate the verification workload to increase its performance with a minimal effect on overall reliability. An anomaly-speculation-based filter checker is proposed to guide a verification priority before the re-execution process starts. This technique is accomplished by exploiting a value similarity property, which is defined by a frequent occurrence of partially identical values. Based on the biased distribution of similarity distance measure, this paper investigates further application to exploit similar values for soft error tolerance with anomaly speculation. Extensive measurements prove that the majority of instructions produce values, which are different from the previous result value, only in a few bits. Experimental results show that the proposed scheme accelerates the processor to be 180% faster than traditional fully-fault-tolerant processor with a minimal impact on overall soft error rate.

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